The title says it all. I'm curious if I should ask any FPGA-related questions here.
]]>Urban dictionary doesn't offer any alternative meanings. So no. No I do not.
]]>I messed around with xilinix software in college a long time ago, but nothing since then.
]]>I've written a fair share of VHDL and Verilog, and I've hurled more than a fair share of unspeakable curses at Xilinx and their products.
]]>I think I'm going to be learning Verilog/VHDL this Summer. I'm eyeing the Lattice ECP3 Versa board (2x1000 ethernet, PCI Express form factor), 35K LUTs at a promotional price of only $100 + shipping.
Money is tight however, so I'm trying to learn as much as I can before putting down the monkey* and finding out I'm in way over my head.
The goal is to build a FPGA co-processor for complex/slow algorithms in Linux. Things that can justify transmitting over a bus, as well as (optionally) a driver interface that automatically allows math libraries to exploit it (falling back on the normal software routines if the FPGA is nonexistant/busy). Double optionally, would be allowing reconfiguration of the FPGA (to adapt the working units) while the computer is running, however, this particular board requires a IP Core PCI Express interface (it has no external controller) which means the operating system may/will lose the FPGA interface each time it resets. The upper echelon is partially reconfigurable FPGAs (change only certain blocks/areas instead of starting over), but that only works in a select few FPGAs and I'm not even trying to think that far ahead and I seriously doubt I could get anywhere near that in a single Summer.
All of what I'm trying to do has been accomplished in modern (2005-Present) literature. So I'm not jumping out on one of my crazy ideas. But should I ever "need" such a device, I'd like to know how to implement one.
I also want to learn Haskell this summer. It's built so differently that it fascinates me. (You write definitions/expressions, not computer instructions. So for example, you can have "infinite size" arrays due to lazy evaluation.)
*My new favorite phrase.
]]>I only had some sparse experinece in the Xilinx devices with on board PPC750 processor....had only dabbled with VHDL in University a LOOONG time ago.
Not that I miss them so much.....but a leat a bit
]]>Thanks for making me spend money you ass. but I've wanted to play with FPGAs for a while now. and this price can't really be beat for what you get.
]]>I only had some sparse experinece in the Xilinx devices
I keep hearing Xilinx is a pain in the butt to use their toolchain and lots of their additional signal analysis tools you have to pay for (that Altera includes for free).
Lattice being a distant third/fourth place competitor, I don't know too much about them but I've not heard bad things from those that do. Also, I've seen some ECP3 bitstream development on the Linux Kernal mailing list.
Thanks for making me spend money you . but I've wanted to play with FPGAs for a while now. and this price can't really be beat for what you get.
I know right?! Remember though for PCI Express/Ethernet/etc you'll need to use their IP Cores (which are free for evaluation purposes, but might be time limited to four hours IIRC) unless you're going to implement your own. I'm watching OpenCores.org these days for free versions of everything.
VHDL
Eww.... ADA. Though, I hear most people who learn it don't mind it.
]]>I keep hearing Xilinx is a pain in the butt to use their toolchain and lots of their additional signal analysis tools you have to pay for (that Altera includes for free).
Lattice being a distant third/fourth place competitor, I don't know too much about them but I've not heard bad things from those that do. Also, I've seen some ECP3 bitstream development on the Linux Kernal mailing list.
Back when I worked in manufaturing, I came close to all of these brands for Boundary Scan matters....my fellow colleagues in the HW dev dpt usually regarded XilinX as the "top-notch" choice, espcially for their SoC (....wandering today on their site I've seen that they winded up a dual-core cortex-A9 device with which I would GLADLY lose my time developing something...I rememer those Cortex-A9 from TI and Cortx-M3 from STmicro that were wonderful toys), and Altera as well was the right choice for a cost-to-market finely tuned solution, especially with their debugabble softcore (Nios II)
Lattice on the other hand was the most widely spread out brand on our manufatured PCBs...I think their cost-effectiveness is still unmatched if we spaek about Logic gates per dollar......but I'm counting on memories old like almost a DECADE
I ended up testing a lot of boards with ALL three brands in ther, each with its own "premium" pick.
I find it fascinating how "modern" "programmers" are fascinated by the Hardware and it's procedural representation....back in my University days there was a cliean wall between Harware Guys and Software Guys....
]]>I might be getting my lattice board today \o/
]]>I just ordered mine yesterday!
They might be phasing them out for a new, prettier board, or at least at the end of a production cycle. I looked around and a few dealers had zero in stock with at least two week lead time.
I was going to wait a couple more weeks but when I saw that, I panicked and found a dealer with only four left.
]]>Woot. Just got it. It looks pretty slick. I'll have to play with it this weekend.
I ordered off their site, which is supplied by mouser or digikey (can't remember which) and while it said out of stock, they shipped my board a couple/few days after I put in the order.
I imagine I can figure out how to manage the ethernet without too much difficulty, but the pcie is going to be a challenge initially. I've never even looked into the protocol, and if the board doesn't have a pcie chip on it at all, and it just feeds the signals directly into the fpga, then well, that'll be interesting.
]]>if the board doesn't have a pcie chip on it at all, and it just feeds the signals directly into the fpga, then well, that'll be interesting.
The board comes with neither chips, instead using FPGA cores. They have free IP cores (for evaluation purposes) for both PCIe and Ethernet. My goal is to build a linux driver that interfaces with their PCIe core.
Let me know how it goes!
]]>It looks pretty slick. I'll have to play with it this weekend.
{"name":"30055137.jpg","src":"\/\/djungxnpq2nug.cloudfront.net\/image\/cache\/9\/f\/9f03bdf766dbc09a1f8385b63c3056d4.jpg","w":400,"h":400,"tn":"\/\/djungxnpq2nug.cloudfront.net\/image\/cache\/9\/f\/9f03bdf766dbc09a1f8385b63c3056d4"}
]]>Hey, I was just thinking....if you're not retarded and accept evolution, and you're not spending all your free time watching TV and have a basic grasp on abiogenesis, and have come to rest on the theory that there was a 'starting point' to our universe, and have gone a bit further and started to muse on the idea of quantum theory allowing a sub-atomic 'pop' out of no-where, then surely you're no better off than before!? I mean, we next need to explain the 'pop'??? I think we're just making trouble and more questions for ourselves with this quantum nonsense, and we should just accept that there was nothing and God and one day he got bored and went 'pop'.
Back on topic, yeah, PCI thingy, looks cool.
]]>
Hey, I was just thinking....if you're not retarded and accept evolution, and you're not spending all your free time watching TV and have a basic grasp on abiogenesis, and have come to rest on the theory that there was a 'starting point' to our universe, and have gone a bit further and started to muse on the idea of quantum theory allowing a sub-atomic 'pop' out of no-where, then surely you're no better of than before!? I mean, we next need to explain the 'pop'??? I think we're just making trouble and more questions for ourselves with this quantum nonsense, and we should just accept that there was nothing and God and one day he got bored and went 'pop'.
What the hell are you talking about?
I'm watching Jeff Goldbloom in The Fly and I can help but read all of that in his voice. But I still want to slap you.
Back on topic, yeah, PCI thingy, looks cool.
Damn right it is.
]]>...and I can help but...
Please review the logic in what you just said.[1] Americans...
]]>It's not logic, it's a typo. Armchair warriors...
]]>]]>
]]>
]]>
Aww! Yay! Allegroid love! That's rare nowadays, come on guys, let's kiss this thread to a higher state of consciousness!
]]>I'm really high.
FTFY.
]]>let's kiss this thread to a higher state of consciousness!
If you can reach Maslow's stage of self actualization, I'll write a software library for you...
]]>This thread needs a decent dose of Gull... Either that or a pinch of piccolo, whatever comes first.
]]>I got my FPGA installed. I don't like that it doesn't come with a metal bracket to keep the board from touching my videocard. I'm kind of afraid to leave it in my computer for any long length of time.
My throughput using the Thruput Demo is 640 MB/s read, 461 MB/s write. Is that similar for you?
Lastly, to get your Diamond license, log into your Lattice account and then go to support->licenses and you can request it.
]]>Is that similar for you?
Haven't had a chance to test it.
Lastly, to get your Diamond license, log into your Lattice account and then go to support->licenses and you can request it.
Thanks! I was looking for that.
]]>I have a daunting feeling like I'm going to to feel in-over-my-head for the next few weeks at least.
Haven't had a chance to test it.
Just download the test from the website, and run it. The bitstream is already on the FPGA. The windows driver for it is located in the zip file as well.
Also, Lattice Diamond default directory for searching for the license file is NOT C:\lscc\diamond\2.1_x64\licenses\ even though it said it was. The environment variable wasn't set like it should be, and the default is C:\flexlm\license.dat so I just made the directory.
]]>Just download the test from the website, and run it. The bitstream is already on the FPGA. The windows driver for it is located in the zip file as well.
I haven't had a chance to test it doing research all day today, and going to see the new Star Trek movie tonight (leaving right now actually).
append:
WOW it ties the license to a physical machine. What a crock.
append2:
Lattice just charged my card $233 for a $99 board. What the hell? AND I had to pay Import+GST on it when it got here? Fucking retarded.
]]>What the crap? Send it back and deny the charge.
I bought mine through a vendor, not their website. But I live in the US so I don't know what import will be.
As for the licensing, I think that's pretty common (you pay per "seat" per year) and I've heard that they're pretty good about sending you a new key if you change platforms. You are potentially playing around with tens of thousands of dollars worth of software IP cores.
On a related sidenote, I've been playing around a lot with Logisim lately, a free digital logic simulator/designer. It supports subcircuits which is really cool and useful, so you can design an ALU and then back out and use a single ALU control block.
]]>I talked to them about it, got a bunch of the extra refunded. Not all of it, but w/e.
]]>On a related sidenote, I've been playing around a lot with Logisim lately, a free digital logic simulator/designer. It supports subcircuits which is really cool and useful, so you can design an ALU and then back out and use a single ALU control block.
In our first semester of uni, we had to make a simple 16-bit processor in it and run some simple programs on that using a simple assembly language.
https://github.com/J-Gamer/Data-path
In our first semester of uni, we had to make a simple 16-bit processor in it and run some simple programs on that using a simple assembly language.
Wow, I envy you. In our typical public college we probably wouldn't do stuff like that till our last year.
Although, I was recently watching some lectures from MIT/Stanford/etc and telling my wife how the pacing of their classes (two to three CS topics per class meeting and zero hand holding) is way more my intelligence level (whereas I'm bored to hell at my public institution's slow pacing). So once I get a job, if I go back to grad I'm definitely going to consider going to a higher up university.
]]>...and telling my wife...
Whoa, whoa, hold the fuck up. When did you get married and where was my invite?
]]>I've done VHDL on altera and xilinix.
I also bought a $11k pci-e fpga on ebay for $300 from some Israeli students who were done with it for their project.
[EDIT] it's an altera stratix card.
]]>Whoa, whoa, hold the up. When did you get married and where was my invite?
Last July. I've been dealing with the whole "my spine is collapsing" thing and subsequent transformation into wolverine over the last two years and she's been there by my side the whole way. She's my other half.
{"name":"AFZukvA.jpg","src":"\/\/djungxnpq2nug.cloudfront.net\/image\/cache\/6\/7\/678ea22e5a1405f3e60c2b0f180ecd39.jpg","w":700,"h":700,"tn":"\/\/djungxnpq2nug.cloudfront.net\/image\/cache\/6\/7\/678ea22e5a1405f3e60c2b0f180ecd39"}
I've done VHDL on altera and xilinix.
Great! I might have to pick your brain from time to time!
I also bought a $11k pci-e fpga on ebay for $300 from some Israeli students who were done with it for their project.
[EDIT] it's an altera stratix card.
That sounds beautiful.
]]>