Has anyone been following the new Ryzen? I've been eagerly waiting for 6+ months.
As I set in another thread I'm a bit of an AMD fanboy, and I love when they release their CPUs because the comparable Intel CPUs "suddenly" drop 2-3X in price. (They're not stupid. They've got ONE competitor for desktops and servers.)
Anyhow, the new CPU architecture has:
- 20+ CPU sensors including millivolt and milliwatt power monitoring across... I don't know what granularity. Whether it's only core level, or sub-core level into the individual compute units.
- DDR4 (wooooo)
- A freakin' NEURAL NET cache system that learns your programs access patterns instead of following a pre-set CPU designers algorithm. (Wow!)
- Up to 8 cores for enthusiast market and up to 32 cores for servers.
- Hyper-threading, so 64 virtual cores! (Granted, hyper-threading in general SLOWS many benchmarks because the threads still have the same memory bus and content with the other cores.)
- Much higher energy efficency than the last generation. (Obviously.) The TDP is less than half of my current AMD CPU FX-8370 (~60 vs ~150 W in mine). So there's plenty of room to do what they did with the last generation and just dial the frequency up.
- NO FIXED OVERCLOCK LIMIT. It'll actually scale to your heatsink setup to whatever it can. But, I have no idea how it'll manage to detect and recover / avoid crashing when it's overclocked too far. Maybe it's as simple as an automatic burn-in test through the BIOS. It will use those 20+ sensors I mentioned earlier.
- AM4 socket. I've heard this was one of the biggest bottlenecks for last-gen AMD CPUs including DDR3-only.
- HBM "high bandwidth memory", which is on-chip, 3-D stacked RAM for things like internal videocards. Per here, it runs at 128 GB/s bandwidth. If it were me, I'd have the CPU directly use that RAM and call that stuff L4 cache. But I'm no designer, obviously. HBM 3 is slated for 512 GB/s. HBM 2 has up to 4 GB per "Stack." That's a huge amount of nearby memory. No details (AFAIK) on what HBM the Zen will use yet.
- Hardware encrypted memory pages using an internal ARM Cortex-A5.
- NVM Express. PCI Express bus designed specifically for blasting-fast disk/memory expansion. It targets SSDs, whereas the SATA 3 standard has plenty of overhead because it supports physical drives (as well as perhaps legacy standards.) It supports super long memory queues.
And these are all the chips that are launching. Who knows how far this architecture will scale for later releases. (It's slated to at least 2020.)
- Supports SATA Express. That's pretty neat, check out the wiki. It's completely different and exposes two PCI Express lanes. Apparently it's designed that way because current SATA standards can't keep up with the rising SSD speeds. However, almost nobody is using it yet. So let's hope the standard doesn't flop.